1. Field of the Invention
The present invention relates to generally to analog-to-digital converters, and more particularly to analog-to-digital converters of the single slope detection type which employ common mode rejection circuits.
2. Description of the Prior Art
Integrating analog-to-digital converters, or digital voltmeters, include dual slope and single slope modes of conversion. Dual slope converters typically provide a digital output which is accurately representative of the ratio of the integrals of first and second input signals applied to an integrating means such as a capacitively coupled DC amplifier. The first input signal, representing an analog signal to be measured, generates a first ramp voltage when applied to the amplifier, and the second input signal, representing a reference voltage, generates a second ramp voltage of opposite slope. Time for each of the two ramp voltage voltages to traverse between two voltage levels defines the ratio of the two input signals, and counter means records the count of constant frequency pulses during the time period to provide a measurement of the first input signal via a vis the reference signal. Since two continuous slopes are produced by the two time integrations, such digital voltmeters are referred to as "dual-slope." Dual-slope digital voltage meters are exemplified by U.S. Pat. Nos. 3,051,939; 3,316,547; and 3,713,136.
Analog-to-digital converters or digital voltmeters, of the single slope detection type provide a signal in digital form which is representative of the voltage difference between two input signals in analog form. Typically, such digital voltmeters include a precision voltage source for supplying a ramp reference voltage and a pair of comparators which change state at a time when the level of the ramp voltage applied to a first of their inputs crosses the level of an input signal such as a DC voltage applied to a second input. A digital logic circuit converts the time difference between the change of states of the comparators into a pulse having a duration indicative of the difference in the DC voltages and a display provides a visual indication of the digital signal.
The duration of the pulse developed by these devices is representative of the difference in the input signals provided that the input signals do not include noise voltage, especially such noise voltage having frequencies characterized by cyclic periods of the same order as, or less than, the time interval between output pulses. A common mode noise voltage is that voltage due to noise which is common to the two input terminals relative to a reference level, such as earth ground. A normal mode noise voltage is that voltage due to noise which appears between the two input terminals. The type of noise voltage generally present at the input terminals of voltmeters is due to power-line hum, such as 50 Hertz, 60 Hertz and 400 Hertz hum. Since such noise voltage is characterized by periods of time which are usually less than the time interval between the output pulses, it causes a variation between the actual time that the input signal crosses the ramping reference voltage and the true time, and thus causes a departure in the pulse width from the true difference in the input voltages.
In prior-art single-slope digital voltmeters, attempts have been made to diminish the magnitude of common mode noise voltage by introducing filter circuits ahead of the comparators. However, in order to achieve good common mode noise voltage suppression, the filter circuits have required matched components. This, of course, adds to the overall cost of the device. Another dis-advantage of this approach is that the filters are only successful in rejecting a limited amount of the common mode noise voltage. Thus, heretofore dual-slope digital voltmeters have offered substantially more accuracy in measurement than single-slope digital voltmeters.